The present invention relates to a method of manufacturing a semiconductor device. Particularly, the present invention is concerned with a technique applicable effectively to a manufacturing technique for a semiconductor device in which a conductive member is coupled through an electrode layer to a bonding pad, the bonding pad being exposed from an opening formed in a passivation film.
In Japanese Unexamined Patent Publication No. 2009-124042 (Patent Document 1) there is described a structure in which a solder ball is mounted through both barrier film and post bump onto the surface of a wiring line exposed from an opening formed in a passivation film.